(1) FIELD OF THE INVENTION
The invention relates to the joining of integrated circuit elements to the next level of integration and more particularly to the formation of the bonded structure which comprises the physical and electrical connection between the integrated circuit element and the next level of integration.
(2) DESCRIPTION OF THE RELATED ART
In the manufacture of highly dense integrated circuits the formation of an inexpensive and highly reliable mechanical bond and electrical interconnection has long been recognized to be of key importance. Some time ago a solution to this need was patented by L. F. Miller et al in U.S. Pat. No. 3,401,126. This method worked well for many years but increasing levels of integration and circuit density have made the need for interconnections on an increasingly fine pitch of key importance.
A method for achieving increased interconnection density was patented by K. Hatada in U.S. Pat. No. 4,749,120. This method employs a gold bump as the electrical interconnection between the IC circuit chip and the substrate while holding the IC chip in place with a resin coating on the substrate acting as an adhesive between chip and substrate. This method has the disadvantage of a relatively high Young's Modulus for metal. As a result of the high Young's Modulus a very large bonding force is required between the IC chip and the substrate during the bonding process while the resin is undergoing its curing cycle. After the bonding process the gold bump will tend to return to its original shape and the recoil forces will disengage some of the bumps from the electrodes on the substrate. Another method patented by Y. Tagusa et al in U.S. Pat. No. 4,963,002 employs nickel plated plastic beads or silver particles to achieve the electrical connection, but the former suffers from small contact area and the latter has the disadvantage of the relatively high Young's Modulus for silver.
U.S. Pat. No. 4,916,523 issued to Sokolovsky et al shows a unidirectional conductive adhesive to bond the integrated circuit to the substrate. U.S. Pat. No. 5,134,460 issued to Brady et al shows conductive metal bumps coated with a gold layer.